asahi kasei [akd5381] 2002/06 - 1 - general description akd5381 is an evaluation board for the digital audio 24bit 96khz a/d converter, AK5381. the akd5381 includes the input circuit and also has a digital interface transmitter. further, the akd5381 can achieve the interface with digital audio systems via opt-connector. ? ordering guide akd5381 --- evaluation board for AK5381 function ? dit with optical output ? bnc connector for an external clock input lin rin va,vd ak4103 (dit) opt out clock generator dsp data 10pin header agnd,dgnd AK5381 figure 1. akd5381 block diagram * circuit diagram and pcb layout are attached at the end of this manual. evaluation board rev.a for AK5381 akd5381
asahi kasei [akd5381] 2002/06 - 2 - 1. evaluation board manual ? operation sequence 1) set up the power supply lines. [va] (red) = 4.75 5.25v : for va of AK5381 (typ. 5.0v) [vd] (orange) = 2.7 5.25v : for vd of AK5381, 74lvc541 (typ. 5.0v) [vcc] (red) = 5v : for logic [agnd] (black) = 0v : for analog ground [dgnd] (black) = 0v : for logic ground each supply line should be distributed from the power supply unit. 2) set up the evaluation mode, jumper pins and dip switches. (see the followings.) 3) power on. the AK5381 and ak4103 should be reset once bringing sw1 = ?l? upon power-up. ? evaluation mode (1) slave mode (1-1) a/d evaluation using dit function of ak4103 port1 (dit) is used. dit generates audio bi-phase signal from received data and which is output through optical connector (totx176). it is possible to connect akm?s d/a converter evaluation boards on the digital- amplifier which equips dir input. nothing should be connected to port2 (dsp). in case of using external clock through a bnc connector (j3), select ext on jp10 (clk) and short jp7 (xte) and open jp12 (ext). jp10 clk jp3 sclk jp5 lrck jp7 xte jp12 ext xtl ext (2) master mode (2-1) a/d evaluation using dit function of ak4103 port1 (dit) is used. dit generates audio bi-phase signal from received data and which is output through optical connector (totx176). it is possible to connect akm?s d/a converter evaluation boards on the digital- amplifier which equips dir input. nothing should be connected to port2 (dsp). in case of using external clock through a bnc connector (j3), select ext on jp10 (clk) and short jp7 (xte) and open jp12 (ext). jp10 clk jp3 sclk jp5 lrck jp7 xte jp12 ext xtl ext
asahi kasei [akd5381] 2002/06 - 3 - ? other jumper pins set up 1. jp1 (gnd) : analog ground and digital ground open : separated. short : common. (the connector ?dgnd? can be open.) 2. jp2 (va) : select va for AK5381 reg : supply from regulator. va connector should be supplied +15v. va : supply from va connector 3. jp4 (reg) : select va for AK5381 open : not use regulator short : use regulator 4. jp6 (vd) : select vd for AK5381 va : supply from va connector vd : supply from vd connector 5. jp8 (bcfs) : select sclk frequency 256 : in case of mclk=256fs/512fs/768fs 384 : in case of mclk=384fs 6. jp9 (mclk) : supply mclk frequency for 74hc4040 256 : in case of mclk=256fs 512 : in case of mclk=512fs 768 : in case of mclk=384fs/768fs 7. jp11 (lrfs) : select lrck frequency 256 : in case of mclk=256fs/512fs/768fs 384 : in case of mclk=384fs
asahi kasei [akd5381] 2002/06 - 4 - ? dip switch set up [sw2] (mode1): setting the evaluation mode for AK5381 and ak4103 on is ?h?, off is ?l?. no. name off (?l?) on (?h?) 1 dif msb justified i 2 s compatible 2 cks2 3 cks1 4 cks0 see table 2 5 dit1 6 dit0 see table 3 table 1. mode setting cks2 cks1 cks0 input level hpf master/slave mclk sclk l l l cmos on slave 256/384/512/768fs 48fs or 32fs l l h cmos off slave 256/384/512/768fs 48fs or 32fs l h l cmos on master 256fs ( 96khz) 64fs l h h cmos on master 512fs ( 48khz) 64fs h l l ttl on slave 256/384/512/768fs 48fs or 32fs h l h reserved h h l cmos on master 384fs ( 96khz) 64fs h h h cmos on master 768fs ( 48khz) 64fs table 2. mode setting of AK5381 mode dit1 dit0 mclk fs 0 off off 256fs 96khz default 1offon n/a n/a 2 on off 512fs 48khz 3 on on 384fs 48khz table 3. mclk frequency setting of ak4103 note: ak4103 does not support mclk=768fs. ? the function of the toggle sw upper-side is ?h? and lower-side is ?l?. [sw1] (pdn): resets the AK5381 and ak4103. keep ?h? during normal operation.
asahi kasei [akd5381] 2002/06 - 5 - ? input circuit analog signal is input to lin/rin pins via j1 and j2 connectors. ainr j1 rin + c2 10u j2 lin ainl + c1 10u figure 2. lin/rin input circuits * akm assumes no responsibility for the trouble when using the circuit examples.
asahi kasei [akd5381] 2002/06 - 6 - measurement results [measurement condition] ? measurement unit : audio precision, system two cascade ? mclk : 256fs ? sclk : 64fs ? fs : 48khz, 96khz ? bit : 24bit ? power supply : va = vd = 5.0v ? interface : dit ? temperature : room parameter result (lch / rch) unit adc analog input characteristics: s/(n+d) ( ? 1db input) fs=48khz fs=96khz 96.7 / 96.9 93.1 / 93.6 db db d-range ( ? 60db input) fs=48khz, a-weighted fs=96khz 106.5 / 106.5 101.7 / 101.7 db db s/n fs=48khz, a-weighted fs=96khz 106.7 / 106.7 101.8 / 101.7 db db interchannel isolation 115.1 / 113.2 db
asahi kasei [akd5381] 2002/06 - 7 - [adc plot : fs=48khz] akm AK5381 t hd+n vs. input level va=vd=5 .0v, fs=48khz, fin=1khz -120 -80 -117.5 -115 -112.5 -110 -107.5 -105 -102.5 -100 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 d b f s -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr figure 1. thd+n vs. input level akm AK5381 thd+n vs. input frequency va=vd=5 .0v, fs=48khz, input=-1dbr -120 -80 -117.5 -115 -112.5 -110 -107.5 -105 -102.5 -100 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 d b f s 20 20k 50 100 200 500 1k 2k 5k 10k hz figure 2. thd+n vs. input frequency
asahi kasei [akd5381] 2002/06 - 8 - akm AK5381 linea rity va=vd=5 .0v, fs=48khz, fin=1khz -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr figure 3. linearity akm AK5381 f requency response va=vd=5 .0v, fs=48khz, input=-1dbr -1.5 -0.5 -1.4 -1.3 -1.2 -1.1 -1 -0.9 -0.8 -0.7 -0.6 d b f s 20 20k 50 100 200 500 1k 2k 5k 10k hz figure 4. frequency response
asahi kasei [akd5381] 2002/06 - 9 - akm AK5381 c rosstalk va=vd=5 .0v, fs=48khz, input=-1dbr -150 -80 -145 -140 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 d b 20 20k 50 100 200 500 1k 2k 5k 10k hz figure 5. crosstalk akm AK5381 fft plot va=vd=5.0v, fs=48khz, input=-1dbr, fin=1khz 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 6. fft plot
asahi kasei [akd5381] 2002/06 - 10 - akm AK5381 fft plot va=vd=5 .0v, fs=48khz, input=-60dbr, fin=1khz 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 7. fft plot akm AK5381 fft plot va=vd=5 .0v, fs=48khz, fin=none 20 20k 50 100 200 500 1k 2k 5k 10k hz -180 +0 -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 8. fft plot
asahi kasei [akd5381] 2002/06 - 11 - [adc plot : fs=96khz] akm AK5381 t hd+n vs. input level va=vd=5 .0v, fs=96khz, fin=1khz -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -120 -80 -117.5 -115 -112.5 -110 -107.5 -105 -102.5 -100 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 d b f s figure 9. thd+n vs. input level akm AK5381 thd+n vs. input frequency va=vd=5 .0v, fs=96khz, input=-1dbr 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -120 -80 -117.5 -115 -112.5 -110 -107.5 -105 -102.5 -100 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 d b f s figure 10. thd+n vs. input frequency
asahi kasei [akd5381] 2002/06 - 12 - akm AK5381 linea rity va=vd=5 .0v, fs=96khz, fin=1khz -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -140 +0 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 11. linearity akm AK5381 f requency response va=vd=5 .0v, fs=96khz, input=-1dbr 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -1.5 -0.5 -1.4 -1.3 -1.2 -1.1 -1 -0.9 -0.8 -0.7 -0.6 d b f s figure 12. frequency response
asahi kasei [akd5381] 2002/06 - 13 - akm AK5381 c rosstalk va=vd=5 .0v, fs=96khz, input=-1dbr 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -150 -80 -145 -140 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 d b figure 13. crosstalk akm AK5381 fft plot va=vd=5.0v, fs=96khz, input=-1dbr, fin=1khz 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 14. fft plot
asahi kasei [akd5381] 2002/06 - 14 - akm AK5381 fft plot va=vd=5 .0v, fs=96khz, input=-60dbr, fin=1khz 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 15. fft plot akm AK5381 fft plot va=vd=5 .0v, fs=96khz, fin=none 20 40k 50 100 200 500 1k 2k 5k 10k 20k hz -180 +0 -170 -160 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 16. fft plot
asahi kasei [akd5381] 2002/06 - 15 - important notice ? these products and their specifications are subject to change without notice. before considering any use or application, consult the asahi kasei microsystems co., ltd. (akm) sales office or authorized distributor concerning their current status. ? akm assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. ? any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. ? akm products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and akm assumes no responsibility relating to any such use, except with the express written consent of the representative director of akm. as used here: a. a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. b. a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. ? it is the responsibility of the buyer or distributor of an akm product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification.
a a b b c c d d e e e e d d c c b b a a agnd dgnd vd va reg va AK5381 a akd5381 a3 13 wednesday, march 27, 2002 title size document number rev date: sheet of 5381_pdn 5381_slrck cks0 sclk cks2 dif 5381_ mclk lrck 5381_ssclk sdto cks1 d3v vd va l2 (short) 1 2 + c10 10u + c2 10u c11 0.1u + c3 2.2u j1 rin l1 (short) 1 2 + c12 47u 1 2 t1 ta48m05f in out gnd + c7 10u jp1 gnd j2 lin jp4 reg r2 51 r3 5.1 c8 0.1u cn1 1 2 3 4 5 6 7 8 r1 51 + c9 47u 1 2 AK5381 u1 1 2 3 4 5 6 7 8 10 11 12 13 15 14 16 9 ainr ainl cks1 vcom agnd va vd dgnd lrck mclk sclk pdn cks2 dif cks0 sdto c4 0.1u jp2 va c6 0.1u + c1 10u r4 51 jp5 lrck jp6 vd jp3 sclk cn2 9 10 11 12 13 14 15 16 c5 0.1u
a a b b c c d d e e e e d d c c b b a a sdto lrck sclk mclk h l dit a akd5381 a3 23 wednesday, march 27, 2002 title size document number rev date: sheet of mclk mclk dif dit1 dit0 pdn sdto lrck sclk vcc vcc vcc vcc c16 0.1u d1 hsu119 2 1 + c17 10u c15 0.1u r5 10k u4 74act541 2 3 4 5 6 7 8 9 1 19 18 17 16 15 14 13 12 11 20 10 a1 a2 a3 a4 a5 a6 a7 a8 g1 g2 y1 y2 y3 y4 y5 y6 y7 y8 vcc gnd c14 0.1u u2b 74hc14 3 4 port2 dsp 1 2 3 4 5 6 7 8 9 10 port1 dit 1 2 3 4 5 6 gnd if vcc in 5 6 r6 1k u2a 74hc14 1 2 sw1 pdn 2 1 3 c13 0.1u u3 ak4103 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 v1 trans resetn mclk sdti bick lrck fs0/csn fs1/cdti fs2/cclk fs3/cdto c1 ans bls cks0 cks1 dvdd dvss txn txp dif0 dif1 dif2 u1
a a b b c c d d e e e e d d c c b b a a for 74hc 14, 74hcu04, 74hc4040, 74ac74 74ac163 256 ext xtl 512 cks2 cks1 dit1 dif dit0 cks0 768 256fs 64fs fs 256 384 384 256 logic a akd5381 a3 33 wednesday, march 27, 2002 title size document number rev date: sheet of mclk 5381_slrck 5381_ mclk 5381_ssclk dif cks2 cks1 5381_pdn cks0 dit0 dit1 pdn d3v vcc vcc vcc vcc vcc c26 0.1u r8 51 u2c 74hc14 5 6 c23 0.1u u5e 74hcu04 11 10 u7a 74ac74 2 5 3 6 4 1 dq clk q pr cl jp11 lrfs u9 74lvc541 2 3 4 5 6 7 8 9 1 19 18 17 16 15 14 13 12 11 20 10 a1 a2 a3 a4 a5 a6 a7 a8 g1 g2 y1 y2 y3 y4 y5 y6 y7 y8 vcc gnd c25 0.1u j3 ext u5a 74hcu04 1 2 u8 74ac163 3 14 4 13 5 12 6 11 15 7 10 2 9 1 aqa bqb cqc dqd rco enp ent clk load clr c24 0.1u c20 0.1u u2e 74hc14 11 10 u5b 74hcu04 3 4 c22 0.1u u5f 74hcu04 13 12 u5c 74hcu04 5 6 c18 (open) u6 74hc4040 10 11 9 7 6 5 3 2 4 13 12 14 15 1 clk rst q1 q2 q3 q4 q5 q6 q7 q8 q9 q10 q11 q12 r7 1m u2f 74hc14 13 12 jp9 mclk c19 (open) jp8 bcfs x1 12.28 8mhz u7b 74ac74 12 9 11 8 10 13 dq clk q pr cl u5d 74hcu04 9 8 jp7 xte jp12 ext rp1 47k 5 4 3 2 1 sw2 mode 1 2 3 4 5 6 12 11 10 9 8 7 jp10 clk + c21 47u u2d 74hc14 9 8
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